This article reports for the first time a stiffness-adjustable resonant accelerometer using distributed electrostatic drive scheme, which has great potential in realizing high-frequency mode and improving sensitivity of accelerometers. First, consisting sensitive mass block, beam, driving electrode, two regulating electrodes, sensing electrode is designed, fabricated, characterized. Then, performance beam been fully assessed through its open-loop responses, with sensitivities 85, 134, 135...

Based on an analytical surface potential and a simple mathematical approximation for the source depletion width, physics-based capacitance model with closed form silicon double-gate tunnel field-effect transistors (TFETs) is developed. Good agreements between proposed numerical simulations have been achieved, which reveal that tunneling carriers from negligible contribution to channel charges gate can be almost acted as gate-drain capacitance, quite different of MOSFETs. This without...

Based on an analytical surface potential model incorporating the channel inversion carriers, a physics-based terminal capacitance with closed-form solutions for hetero-gate-dielectric (HGD) tunnel field-effect transistor (TFET) is developed first time. Good agreements between proposed and numerical simulations have been achieved in all operation regimes different HGD structures. The without involving any iterative process can be easily applied to widely used SPICE would helpful transient...

Currently available DC line protection methods for AC/DC hybrid systems present poor immunity to fault resistance in-zone faults and mal-operation problems out-of-zone faults. This paper proposes a new pilot directional scheme based on the voltage difference between positive negative poles (VDPN). The proposed method is not affected by location, resistance, or lightning interference. By analyzing conducting states of converter in different time intervals, differential expressions injected...

Nested oversampling successive approximation (Nested-OSA) technique is proposed in this brief. This provides enhancement the effective accuracy of readout circuit for micro-electromechanical systems (MEMS) capacitive accelerometer. The with Nested-OSA contains a main switched-capacitor amplifier which achieves capacitance-to-voltage conversion and an auxiliary suppresses "holding error" appears OSA process. approach reduces DC gain error offset to 4-order infinitesimal 2-order infinitesimal....

Periodic switching processes of transistors may cause high-level electromagnetic interference (EMI), which will conduct along magnetic components in the system and threaten electromagnetically sensitive facilities. In order to evaluate impacts on propagation EMI, it is necessary investigate capacitive effects whole component, i.e., global effects. this case, detailed partial capacitance (PC) networks based turn-to-turn turn-to-ground capacitances be impractical due their size resultant...

Gate–source overlap tunneling FETs (GSO-TFETs) as a novel ternary device are very promising in low-power neuromorphic circuits. In this article, an accurate potential model of the GSO-TFETs is presented for face-tunnel region considering quasi-mobile charges (QMCs) based on analysis mechanism. Then potential-based analytical current developed first time to predict process and line-tunnel simultaneously with both gate drain modulations. The modeling results validated TCAD simulations good...

A thermal reliability model is proposed for board level package-on-package (POP) assembling in this work, Design analysis performed to study the effect of key package parameters such as die size, substrate solder ball etc. According finite elements on model, distribution and gratitude 3-dimension obtained within ±10% error limit. Therefore, live working chip can be predicted by distribution, stress point concluded gratitude. The valid implemented a 3-package stacked structure, comparing...

Many emerging applications and the ubiquitous wireless signals have accelerated development of WiFi-based indoor localization techniques. However, there is one primary issue, that environmental dynamics will greatly undermine fingerprint stability over time, hindering these techniques to be fully practical. Although many researchers dedicated deal with adaptation problem, it still remains an open problem without a wholesome approach. In this study, we propose TaLc, time adaptive low cost...

This paper presents a multi-parallel sampling based coarse-fine time-to-digital converter (TDC) with sub-gate delay resolution, large measurement range and high conversion rate for light detection ranging (LiDAR) sensors. The fine-TDC is designed on voltage-controlled line (VCDL) but D flip-flop (DFF) groups to achieve resolution multi-phase interpolation. These DFF are triggered by several successively delayed clocks that generated phase-locked loop (PLL) clock generator. coarse-TDC...

In this paper, a non-overlap clock (NVC) generator for high accuracy fully differential Switched Capacitor (SC) readout circuit which is applied in Micro-Electro Mechanical System (MEMS) sensor proposed. Compared with traditional generator, generating set of clock, generates new clocks are being nested inside the primary clocks, and driven by these clocks. The influence charge injection reduced thus its improved. For more complex switched capacitor circuits, functional extension can be...

Currently, 3D multi-chip stack assembly is becoming the future development direction of advanced manufacturing process for printed circuit board. However, during Components stacked packages, Warpage control chips in reflow soldering particularly important. By Combining Taguchi method and injection molding simulation software – Moldflow, this paper studied FBGA PBGA warpage deformation POP, setted four design factors, such as mold temperature, melt pressure time , find out minimum combination...

Aiming to the solder ball reliability of package on under thermal cycling load, three dimensional finite element model was established using ABAQUS. Temperature cycle load pop stress strain analyzed and fatigue life joints predicted. Results showed that maximum concentrated at corner distribution presented dumbbell-shaped in individual ball. The cumulative equivalent creep located inner edge silicon chip.

Abstract In view of the large seasonal temperature difference, and difference between day night, difficulty in supplying domestic hot water supply high altitude area, contradiction low efficiency cost single type solar collector system, a hybrid heat collection system based on two different types collectors has been considered this paper, multi-objective optimization model for collecting area also established to solve above problems. Besides, fast effective method was proposed solving model....

We theoretically investigate an end-coupled metal-dielectric-metal (MDM) structure that achieves analogous plasmon-induced absorption (APIA) in area-cost-free manner. First, a squared ring is set to end-couple with MDM input and output waveguides, generating three Lorentzian-like peaks the spectrum. Then, two APIA windows as well Fano resonances can be induced via appropriately arranging area-free cavities. Numerous numerical results demonstrate proposed has remarkable sensing phase...

The multilayer Package-on-Package (POP) stacking technique is widely applied in the area of portable electronics, which has better flexibility and expansibility. Meanwhile, signal speed 3D integration packages increases continuously, requires package interconnect structure to have good integrity. In this paper, based on a novel stacked cylindrical POP structure, design about noise interference problem transmission between neighboring layers chip approach improve quality present by building...

With the developing of electronics industry, 3-D package stack has been a new trend. Currently, most on (POP) adopted bump interconnection with solder balls, resulted in some issues, such as bridging, shifting and warpage. In this paper, novel stacking method is presented to solve problems accuracy mentioned above. The insulating medium was adhered substrate; hole drilled according requirement. Then filled copper interconnects substrates through medium. Meanwhile, lead-free soldering filling...

In this paper, an aging small-signal model for degradation prediction of microwave heterojunction bipolar transistor (HBT) S-parameters based on prior knowledge neural networks (PKNNs) is explored. A dual-extreme learning machine (D-ELM) structure with adaptive genetic algorithm (AGA) optimization process used to simulate the fresh InP HBT devices and after accelerated aging, respectively. addition reliability parametric inputs original problem, S-parameter trend obtained from equivalent...

In this paper, a single-event transient model based on the effective space charge for MOSFETs is proposed. The physical process of deposited and moving charges analyzed in detail. influence electric field depletion region investigated. decreases short time period due to neutralization charge. After that, increases first then when moved out. movement body mainly occurs through ambipolar diffusion because its high-density electrons holes. derivation variation modeled according analysis....

In nanoscale CMOS process, integrated circuits (ICs) face serious gate reliability issues such as the damage of electrostatic discharge (ESD). The RC-triggered silicon-controlled rectifier (SCR) is widely studied for high turn-on efficiency and capability. However, large leakage current MOS capacitor in traditional RC network process not desired. this work, a modified detection circuit with feedback technique proposed. reduced to 16 nA at room temperature (25 °C). Under ESD event, it injects...

This paper describes a supply modulator for RF power amplifier capable of average-power-tracking (APT) mode and envelope-tracking (ET) mode. The uses single controller switched stage both modes realizes short transitions less than 10 μs, required feature air interface standards specified by 3GPP, such as LTE 5G. Furthermore, the integrator-less minimizes order control system accelerates during APT