This article presents a low-power, all-digital multichannel time-to-digital converter (TDC) for light detection and ranging (LiDAR) sensors. The proposed TDC architecture measures the time interval through coarse counter, middle, fine delay line-based interpolation technique (the Nutt method). Automatic calibration by middle delay-locked loops (ADDLLs) is provided to ensure stability of generated slots. Charge pump, loop filter, voltage-controlled line inside conventional analog (DLLs) are...

This article presents a power-efficient hybrid energy-harvesting system that scavenges energy from solar, vibration, and radio frequency (RF) sources converts into regulated output dc voltage courtesy buck–boost dc–dc converter. The proposed architecture incorporates tetra-paths for maintaining high power conversion efficiency (PCE) over extended input range (−10 to 30 dBm). A time-domain maximum point tracking technique is solar harvester. high-efficiency full wave rectifier designed...

In this article, we present an integrated triple-mode wireless power transmitter unit (TWPTU) circuit supporting all three alliance for (A4WP), consortium (WPC), and matters (PMA) standards, simultaneously, high-efficiency battery charging application. The amplifier (PA) utilizes the adaptive gate splitting technique free-wheeling control to achieve high efficiency in triple modes. programmable supply voltage from two dc–dc converters supplies PA. output of PA is measured by proposed...

This paper presents a second-order discrete-time Sigma-Delta (SD) Analog-to-Digital Converter (ADC) with over 80 dB Signal to Noise Ratio (SNR), which is applied in signal conditioning IC for automotive piezo-resistive pressure sensors. To reduce the flicker noise of structure, choppers are used every stage high gain amplifiers. Besides, required area and power, only CIC filter structure adopted as decimation filter. has configurable that can be different data rates input bandwidths. The...

This article presents a 2.4 GHz and high-efficiency wireless power receiver (Rx) integrated with low-power transmitter (Tx) for charging of the Internet-of-Things (IoT) or wearable devices. A single pole double throw (SPDT) circuit isolates operation Rx from Tx, thereby offering capability sharing antenna between them. The employs radio frequency (RF)-dc converter, which is facilitated threshold voltage cancellation technique enhancing efficiency, adjustable internal impedance matching...

This paper presents a multi-gain radio frequency (RF) front-end low noise amplifier (LNA) utilizing multi-core based on the source degeneration topology. The LNA can cover wide range of input and output matching by using receiver (RX) switch at capacitor bank LNA. In proposed architecture here, to avoid saturation RX chain, 12 gain steps including positive, 0 dB, negative power gains are controlled mobile industry processor interface (MIPI). offers ability control consumption over different...

This paper presents a successive approximation register (SAR) analog-to-digital converter (ADC) designed for wireless power transfer system. is four–channel SAR ADC structure with 10-bit resolution each channel, which can also be applied as single 12-bit ADC. To reduce the area and number of required devices in module, hybrid-type capacitor resistor DACs applied, DAC shared between channels determines seven least significant bits (LSB)s, while three most (MSBs). For operation mode, to...

This paper presents a RF/Solar/Thermoelectric/Triboelectric/Vibration hybrid energy harvesting based high efficiency wireless power receiver (WPR). The proposed WPR architecture incorporates high-power path and low-power maintaining conversion (PCE) over wide input range (-10 dBm to 30 dBm). Time-domain Maximum Power Point Tracking (MPPT) is for Solar/Thermal Energy Harvester. High Efficiency Full Wave Rectifier (FWR) designed Triboelectric/Vibration Rectifier. A 5.8 GHz RF DC-Converter with...

This paper presents a 5.8 GHz highly sensitive, high-dynamic-range RF receiver front-end with Automatic-Gain Control (AGC) and high image-rejection for Dedicated Short-Range Communication (DSRC) application. It is formed by transceiver common matching, single to differential Low-Noise Amplifier (LNA), an active mixer Image Rejection Filter, AGC unit. The proposed unit composed of power-detector over the intermediate-frequency signals downconverter mixer. power detector produces wide dynamic...

This paper presents an Image Rejection Mixer (IRM) for 5.8 GHz Dedicated Short Range Communication (DSRC) Receiver. The proposed IRM operates with both of the Intermediate Frequencies (IF) equal to 5 MHz and 10 which is suitable regions their standard IF or MHz. mixer implemented by image rejection function through a passive RC polyphaser filter. has conversion gain up 7.1 dB, ratio (IRR) exceeds 24.4 dB at IFs MHz, its output 1-dB compression point third-order intercept are -12.3 dBm...

Design of a 12-bit Pipeline Analog to Digital Converter (ADC) with 40 MS/s sampling rate using proposed modified Operational Amplifier (OP-AMP) is presented in this paper. The ADC architecture, consists eleven pipeline stages ten 1.5-bit pipelined and one flash 2-bits resolution. This design implemented by the 90-nm CMOS process. power consumption reduced various techniques, including sample hold (SH) less OP-AMP sharing technique, capacitor size scaling ADC. FFT analysis which results...

This paper presents a 2.15 µW/MHz at the frequency of 64 MHz relaxation oscillator with dynamic range from 47.5 to 80 MHz. To reduce power consumption and improve energy efficiency, this work employs only one comparator capacitor generate output clock in comparison conventional structures. A total 50% ± 5% duty cycle is obtained for by implementing an auxiliary comparator. The proposed uses voltages external low-dropout (LDO) voltage bandgap reference (BGR) required supply voltages,...

This paper presents a 5.8 GHz differential cascode power amplifier for an over-the-air wireless transfer application. Over-the-air provides variety of benefits in several applications such as the Internet Things and medical implantation applications. The proposed PA features two fully differentially active stages with custom-designed transformer to provide single-ended output. custom-made shows high quality factor, 11.6 11.2 primary secondary sides at GHz. Fabricated using standard 180 nm...

This paper presents an analog front-end for fine-dust detection systems with a 77-dB-wide dynamic range and dual-mode ultra-low noise TIA 142-dBΩ towards the maximum gain. The required high sensitivity of signal conditioning path dictates having at while Input-Referred Noise (IRN) is kept low. Therefore, to detected current bio-signals provided by photodiode module. front end formed TIA, DC-Offset Cancellation (DCOC) circuit, Single-to-Differential Amplifier (SDA), two Programmable Gain...

This paper presents a high power and highly efficient 5.8 GHz differential two-stage cascode Class-A Power Amplifier (PA) for Wireless Transfer (WPT) system. The PA is designed in standard General Purpose (GP) 180 nm CMOS technology. process does not apply any Radio Frequency (RF) devices such as inductor nor transformer which are essential an RF design. A full custom-made proposed optimized at modeled using EMX analysis. shows 1.5 nH 1.28 inductance the primary secondary sides of while...

This paper presents a 12-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) designed for Bluetooth Low Energy (BLE) application. In order to reduce the number of capacitors in Capacitor Digital Analog (CDAC), split type DAC has been applied VCM-based switching scheme. Applying this, unit each CDAC reduced by over 14 times. reduces area which is dominated CDAC. Also, input and reference buffers design specifications are relaxed, mismatch reduced. The conversion...

This paper presents a dual-mode adjustable-high-gain transimpedance amplifier (TIA). The TIA is designed with high sensitivity to current bio-signals for fine-dust detection system Integrated Circuit (IC) based on the operation of photodiode module gain amplifications. Gain adjustment implemented by coarse steps using selective-loads four different values and fine 42 dBΩ during 16 steps. To improve settling time, capacitive compensation applied last stage. An off-state circuitry proposed...

This paper presents a 12-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) designed for Bluetooth Low Energy (BLE) application. The objective of this work is to reduce the number capacitors in Capacitor Digital Analog (CDAC). To achieve this, hybrid type DAC has been applied where 8 Most Significant Bits (MSB)s are decided through capacitive and 4 Least (LSB)s Resistor (RDAC). conversion speed design reaches up 6 MS/s. prototype ADC 90 nm complementary metal-oxide...

This paper presents a 2-GHz reconfigurable transmitter designed for the high-bands uplink of an NB-IoT RF transceiver. The is formed by active upconversion mixer, fully differential class D Power Amplifier (PA). To do coarse power gain reconfiguration TX multi-tapped transformer which offers multi secondary taps delivering various levels to antenna. fine-tuning output level capacitor bank implemented at primary side transformer. tuning resonance frequency while forming LC tank with side....

This paper proposes a reference voltage generator structure based on the difference between threshold voltages (Vth) of standard (SVT) and low (LVT) transistors. The proposed does not apply any passive resistors or bipolar junction transistors (BJT). is designed using 55 nm (shrinked 65 nm) CMOS process achieved temperature coefficient (TC) 1.6-ppm/°C over -40°C to 85°C ranges. power supply rejection ratio (PSRR) for this -93dB.

This paper presents a Dual-Port-15-Throw (DP15T) antenna switch module (ASM) Radio Frequency (RF) implemented by branched technique which has high linearity for wireless communications and various frequency bands, including low- band of 617-960 MHz, mid-frequency 1.4-2.2 GHz, high-frequency 2.3-2.7 GHz. To obtain an acceptable Insertion Loss (IL) provide consistent input each throw, is proposed that distributes unified magnetic field at the inputs throws. The other role to increase...