- Advancements in PLL and VCO Technologies
- Analog and Mixed-Signal Circuit Design
- Radio Frequency Integrated Circuit Design
- Energy Harvesting in Wireless Networks
- Wireless Power Transfer Systems
- Advanced DC-DC Converters
- Innovative Energy Harvesting Technologies
- Advanced Wireless Communication Techniques
- Advancements in Semiconductor Devices and Circuit Design
- CCD and CMOS Imaging Sensors
- Advanced Memory and Neural Computing
- Low-power high-performance VLSI design
- Semiconductor Lasers and Optical Devices
- Cellular Automata and Applications
- Advanced MEMS and NEMS Technologies
- Electrostatic Discharge in Electronics
- Electromagnetic Compatibility and Noise Suppression
- Advanced Power Amplifier Design
- Error Correcting Code Techniques
- Semiconductor materials and devices
- Ferroelectric and Negative Capacitance Devices
- Microgrid Control and Optimization
- ICT in Developing Communities
- Advanced Battery Technologies Research
- Multilevel Inverters and Converters
American International University-Bangladesh
2023
Sungkyunkwan University
2017-2022
ORCID
2022
Karakoram International University
2016-2021
University of Balochistan
2020
Impact
2019
University of Kaiserslautern
2013-2015
Universiti Teknologi Petronas
2015
University of Engineering and Technology Taxila
2014
Iqra University
2010
In this paper, a high efficiency dc-dc buck converter with two-step digital pulse width modulation (DPWM) and low power self-tracking zero current detector (ST-ZCD) is proposed for Internet of Things (IoT) ultralow applications. The hybrid DPWM core linearity consumption to implement the converter. It composed delay control using counter line. An adaptive window analog reduce output voltage ripple within 20 mV. A dead time generator implemented ST-ZCD minimize reverse current. can improve by...
This article presents a power-efficient hybrid energy-harvesting system that scavenges energy from solar, vibration, and radio frequency (RF) sources converts into regulated output dc voltage courtesy buck–boost dc–dc converter. The proposed architecture incorporates tetra-paths for maintaining high power conversion efficiency (PCE) over extended input range (−10 to 30 dBm). A time-domain maximum point tracking technique is solar harvester. high-efficiency full wave rectifier designed...
This article presents a high-efficiency fast transient constant <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -time (COT) control dc–dc buck converter for the Internet of Things applications. The current reused sensor is proposed to enhance loop stability and improve power conversion efficiency at light load. Input sensed added feedback voltage increase output ripple voltage. Fast dc-offset cancelation technique introduced achieve...
This paper presents a low-power frequency-shift keying (FSK) transmitter (TX) with an all-digital phase locked loop (ADPLL) based on direct modulation for use in Bluetooth low energy application. A power ADPLL Retimer, 2-stage time to digital converter, and gain estimation technique is proposed achieve FSK at 1 Mbps data rate. high-efficiency class-D amplifier, dual output modes ramping filter (RDF), reduce the spurious tones. The TX implemented 1P6M 55-nm CMOS technology die size of 0.53 mm...
Recently, piezoresistive-type (PRT) pressure sensors have been gaining attention in variety of applications due to their simplicity, low cost, miniature size and ruggedness. The electrical behavior a sensor is highly dependent on the temperature gradient which seriously degrades its reliability reduces measurement accuracy. In this paper, polynomial-based adaptive digital compensation presented for automotive piezoresistive applications. non-linear dependency accurately compensated by...
In this article, a 15-W quadruple-mode reconfigurable wireless power-receiving unit with high efficiency for Inductive coupling and magnetic resonance-based standards, such as power consortium (WPC), matters alliance (PMA), (A4WP), secure transmission (MST) applications is proposed. Quadruple-mode gate controller(QMGC) proposed in synchronous rectifier to manage sizes of core drivers which results maximum conversion (PCE) each mode based on conduction switching losses. QMGC, switchable zero...
Abstract At present, voice biometrics are commonly used for identification and authentication of users through their voice. Voice based services such as mobile banking, access to personal devices, logging into social networks the common examples authenticating biometrics. In Pakistan, voice-based very in banking mobile/cellular sector, however, these do not use features recognize customers. Therefore, chance with false identity is always high. It essential design a recognition system...
In this article, we present an integrated triple-mode wireless power transmitter unit (TWPTU) circuit supporting all three alliance for (A4WP), consortium (WPC), and matters (PMA) standards, simultaneously, high-efficiency battery charging application. The amplifier (PA) utilizes the adaptive gate splitting technique free-wheeling control to achieve high efficiency in triple modes. programmable supply voltage from two dc–dc converters supplies PA. output of PA is measured by proposed...
This paper presents an on-chip implementation of analog processor-in-memory (PIM)-based convolutional neural network (CNN) in a biosensor. The operator was designed with low power to implement CNN as device on the biosensor, which consists plates 32 × material. In this paper, 10T SRAM-based PIM, performs multiple and average (MAV) operations multiplication accumulation (MAC), is used filter at power. PIM proceeds MAV operations, feature extraction filter, using method. To prepare input...
In this paper, a low-power and small-area Single Edge Nibble Transmission (SENT) transmitter design is proposed for automotive pressure temperature complex sensor applications. To reduce the cost size of hardware, information processed with single integrated circuit (IC) transmitted at same time to electronic control unit (ECU) through SENT. Due its digital nature, it immune noise, has reduced sensitivity electromagnetic interference (EMI), generates low EMI. It requires only one PAD...
In this brief, the design of an ultralow power digitally controlled oscillator (DCO) for Bluetooth low-energy applications is proposed. The DCO core designed to operate in subthreshold region. consumption reduced mainly by maintaining constant current over process, voltage, and temperature (PVT) variations via adjustable low-dropout (LDO) regulator. also employing g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> /I...
In this paper, an ultra-low power, adaptive all-digital integer frequency-locked loop (FLL) with gain estimation and constant current digitally controlled oscillator (DCO) for Bluetooth low energy (BLE) transceiver in Internet-of-Things (IoT) is presented. For locking DCO frequency closest to the target channel, it adaptively controls capacitor banks binary algorithm. With decrease resolution, clock counts each bank bit evaluation dynamically increases proposed technique accurate tracking....
In this paper, a high performance adaptive digital low-dropout voltage regulator (ADLDO) is proposed for Internet-of-Things (IoT) applications. the ADLDO, fully synthesizable controller designed. It automatically senses load variations and adaptively controls multi-loop architecture to reduce quiescent current, minimize output ripples achieve fast transient response. The with hill climbing reduces total bi-directional shift registers length which results in reduced leakage current...
Summary This paper presents a 6‐bit 4 MS/s segmented successive approximation register analog‐to‐digital converter for Bluetooth low energy transceiver applications. To improve the linearity and reduce switching power consumption, structure with new scheme is adopted in capacitive digital‐to‐analog converter. The proposed sequence determines MSBs according to thermometer codes skips some of unnecessary steps while avoiding bubble errors. ensure common mode voltage remains comparatively...
Abstract. Iterative channel decoders such as Turbo-Code and LDPC show exceptional performance therefore they are a part of many wireless communication receivers nowadays. These require soft input, i.e., the logarithmic likelihood ratio (LLR) received bits with typical quantization 4 to 6 bits. For computing LLR values from complex symbol, demapper is employed in receiver. The implementation cost traditional soft-output demapping methods relatively large high order modulation systems, low...
This paper presents a design of 6.8 mW all digital delay locked loop (ADDLL) with digitally controlled dither cancellation (DCDC) for time to converter (TDC) in ranging sensors. ADDLL uses the accumulator (ACC) control line (DCDL) during phase locking which utilizes less power and area as compared analog (DLL). In lock state, ACC value dithers due closed operation. A controller is proposed detect performs cancelation selects optimum controlling replica DCDL TDC It helps jitter reduction...
In this article, a highly reliable radio frequency (RF) wake-up receiver (WuRx) is presented for electronic toll collection (ETC) applications. An intelligent digital controller (IDC) proposed as the final stage improving WuRx reliability and replacing complex analog blocks. With IDC, high accuracy are achieved by sensing ensuring successive, configurable number of signal cycles before enabling power-hungry RF transceiver. The IDC range communication (RC) oscillator current consumption...
In this Letter, a highly reliable automotive integrated protection circuit for human body model electrostatic discharge (ESD) of + 6 kV with an over voltage 8.2–16 V and reverse −16 to 0 is presented. the application, reliability electronic device important. order increase reliability, proposed preserve chip from or voltage. contrast conventional comparator-based circuits, only MOSFET resistors are applied in Letter. Especially, at mode, potential zeroing method block latch up break down...
This paper treats the exploration of carrier (frequency/phase) synchronization methods for use in second generation Digital Video Broadcasting - Return Channel via Satellite (DVB-RCS2). new standard specifies reference bursts consisting very limited number known symbols and operation turbo code decoder at extremely low Signal to Noise Ratio (SNR). The abovementioned constraints rule out most conventional schemes demand a careful investigation algorithms with excellent communication...
Advanced Encryption Standard (AES) is the most widely used public cipher algorithm for crypto related applications in embedded systems. This paper presents an area efficient 16-bit AES architecture key expansion, encryption and decryption. In proposed design, a modular approach adopted it capable of performing all transformations 128, 192 256-bit lengths. The resources are reduced by minimizing slice registers BRAMs without compromising throughput. count cut down sharing hardware logic...
School level ICT policy plans are increasingly attracting and gaining more attention of researchers around the world to integrate in education from grassroots level. In spite this, schools unaware about how develop their own school build capacity. this research emphasis is given on being developed used complex, dual medium instruction multi-cultural system also finds out plans' critical factor, challenges, potential impact rural areas schools. At same time community (e.g. teachers,...
This paper presents a register-transistor level (RTL) based convolutional neural network (CNN) for biosensor applications. Biosensor-based diseases detection by DNA identification using biosensors is currently needed. We proposed synthesizable RTL-based CNN architecture this purpose. The adopted technique of parallel computation multiplication and accumulation (MAC) approach optimizes the hardware overhead significantly reducing arithmetic calculation achieves instant results. While...
Convolutional neural networks (CNNs) have become a primary approach in the field of artificial intelligence (AI), with wide range applications. The two computational phases for every network are; training phase and testing phase. Usually, is performed on high-processing hardware engines, however, part still challenge low-power devices. There are several accelerators; such as graphics processing units field-programmable-gate-arrays (FPGAs). From design perspective, an efficient engine at...
This paper presents a RF/Solar/Thermoelectric/Triboelectric/Vibration hybrid energy harvesting based high efficiency wireless power receiver (WPR). The proposed WPR architecture incorporates high-power path and low-power maintaining conversion (PCE) over wide input range (-10 dBm to 30 dBm). Time-domain Maximum Power Point Tracking (MPPT) is for Solar/Thermal Energy Harvester. High Efficiency Full Wave Rectifier (FWR) designed Triboelectric/Vibration Rectifier. A 5.8 GHz RF DC-Converter with...