ABSTRACT This letter presents a millimeter‐wave ultra‐wideband compact Wilkinson power divider (WPD) with an impedance compensation technique. For the first time, parallel LC resonance networks are introduced to compensate for rapidly decreasing real part of input impedance, resulting in additional matching and lossless frequency points. Besides, this design also leads reduction area by more than 25% compared traditional lumped‐element WPDs. The proposed novel WPD is implemented using 65 nm...

Estimated glucose disposal rate (eGDR) is considered as a reliable alternative indicator of insulin resistance. However, the relationship between eGDR levels and mortality among individuals with cardiometabolic syndrome (CMS), well within different metabolic states in this population, remains unclear. We conducted cohort study on 9928 CMS participants from National Health Nutrition Examination Survey (NHANES) database 1999 to 2018. The population was evaluated using multivariable Cox...

IoT devices usually operate in random-sparse-event scenarios (Fig. 20.2.1). To avoid missing events, traditionally a periodic-wake-up frequency [1] must be orders of magnitude higher than the average event rate, wasting huge power. An emerging event-driven approach seeks to trigger power-hungry high-performance system (HPS) using an ultra-low-power wake-up circuit. State-of-the-art chips with DSP-based and neural-network-based feature extraction consume 12nW [2], 1μW [3], 142nW [4]. However,...

This article presents a 22-47 GHz wideband low-noise amplifier (LNA) with coupled L-type interstage matching inductors. The inductors extend the bandwidth of LNA by moving zeros to lower frequencies cancel effect poles. Meanwhile, asymmetric different inductances can be designed separately achieve better gain flatness. In addition, quality factor is also slightly improved without significantly changing their inductance. fabricated in 0.13-μm SiGe BiCMOS technology, and it occupies core area...

In this paper, the dual common-mode (CM) resonance technique is proposed for lowering phase noise (PN) and flicker PN corner of LC voltage-controlled oscillators (VCOs) across wide tuning range. The CM resonator can provide high resistive input impedance a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2^{\mathbf {nd}}$ </tex-math></inline-formula> harmonic band without dedicated tuning. It both prevent...

This paper presents a high performance cost-effective medium voltage power switch based on the series-connection of low SiC normally-on JFETs using an innovative approach. A prototype module proposed is experimentally demonstrated having on-resistance 127 milliohm and blocking above 4,500V at room temperature. The capable very switching losses. Under 3kV-54A inductive load, turn-on rise time 73ns turn-off fall 37ns; energy loss 14.8mJ 1.5mJ. constructed with reliable, proven commercially...

In this brief, A two-stage power amplifier (PA) with a four-way series-parallel combiner is presented for Ka-band applications. compact stage optimized cascode transistors proposed to minimize the parasitic effects and boost output at mm-wave frequencies. The network employs two spiral transformers transmission-line realize low-loss matching broadband combining. PA fabricated in 130-nm SiGe BiCMOS technology it occupies core area of 0.48 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...

This paper presents two high-efficiency charge pumps (CPs) by utilizing the gate voltage boosting technique (GVBT). Unlike traditional bulk-CMOS and all-NMOS CPs, an input bias is independently applied to terminal, it improves current driving capability without need of large pumping capacitors or high-frequency clocks. Meanwhile, GVBT decouples state transistors from clocks connected capacitor, can eliminate reversion loss in both main auxiliary circuits. Fabricated a 0.18- <inline-formula...

A miniaturized wideband CMOS pole-zero following tunable bandstop filter (BSF) structure is proposed for 5G millimeter-wave application. The simple BSF configuration provides two transmission zeros and one pole, which exhibits a compact size, wide stopband sharp rejection. Benefiting from the feature, maintains consistent selectivity as frequency changes. Theoretical analysis explored to provide physical insight into working mechanism of BSF. For practical validation, prototype BSFs...

This paper presents a mixer-first wideband receiver front-end designed to achieve high linearity and harmonic rejection while minimizing power consumption. The proposed RF adopts LO overlap suppression technology uses 25 % duty cycle for 8-phase operation. In addition, the passive mixer with implicit capacitive stacking provides gain useful signal improves rejection. total consumption of this work is less than 22 mW, majority which consumed by baseband amplifier buffer, making it superior...

Dielectric microstructures coupled with a conventional optical microscope have been proven to be successful way achieve super-resolution imaging. However, limitation of such imaging is the microstructure fabrication ability, which generally provides natural structures (such as spherical, hemispherical, superhemispherical microlenses, and so on). Meanwhile, influences complex shapes on super-resolved still remain unknown. In this paper, direct laser writing (DLW) lithography used produce...

This letter presents a 28-40-GHz 5-bit digital step attenuator (DSA) in 0.13-μm SiGe BiCMOS technology. The DSA achieves low amplitude and phase variations by using the following techniques: 1) combination of distributed, T-type, modified π-type attenuators can ensure variation while maintaining compact size; 2) interstage matching is designed to relax loading effect between each stage; 3) inductive compensation adopted reduce error for 8- 16-dB attenuation cells. exhibits 31-dB tuning range...

A switched-capacitor sigma–delta ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Sigma \Delta $ </tex-math></inline-formula> ) CMOS interface circuit for the closed-loop operation of a micromechanical capacitive accelerometer is presented in this paper. distributed-feedback and feedforward topology proposed to combine with high-Q sensor element obtain sub- notation="LaTeX">$\mu \text{g}/\surd Hz noise...

Background Observational studies have reported a possible association between metabolic syndrome (MetS) and thyroid autoimmunity. Nevertheless, the relationship autoimmunity MetS remains unclear. The objective of this research was to assess causal impact on through utilization Mendelian randomization (MR) methodology. Methods We performed bidirectional MR elucidate their components (positivity TPOAb). Single nucleotide polymorphisms (SNPs) its were obtained from publicly available genetic...

A two-way three-stage W-band power amplifier (PA) in 65 nm CMOS SOI process (Ft/Fmax: 120 GHz/220 GHz) is presented this paper. differential cascode structure with a series-parallel inductor-based T-type inter-stage matching network proposed to improve efficiency and gain near three quarters of Ft. high passive transformer-based parallel combining output implemented increase the achieve compact layout. The PA achieves post-layout simulated 22.1-dB small-signal (S21) 7.2-GHz 3-dB bandwidth...

This paper presents a low voltage power high linearity quadrature mixer for software defined radio applications in 90nm CMOS technology. A 7-dB improvement of input-referred 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> -order intermodulation point (IIP <inf xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> ) is achieved by using differential g xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> ″ (the second derivation...

In this paper, a broadband stacked common-source LNA is presented. By employing multiple feedback technique, the expands bandwidth. Current-reuse technique also adopted to enhance voltage gain and reduce power consumption. The proposed implemented in GF 130-nm SOI CMOS technology, area containing core, SF buffer pads 0.72 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . From post simulation results, shows peak of 18.2 dB, S11/S22...

This paper presents a low-power low-IF RF frontend for 2.4GHz wireless sensor networks (WSN) in 0.18μm CMOS technology. The consists of variable gain low noise amplifier (VG-LNA), quadrature passive mixer and divide-by-two circuit which generates the differential LO signals balanced mixer. effect input parasitic capacitance on inductively degenerated common source LNA's impedance is analyzed detail. An external LC network was used to achieve matching under power consumption. proposed VG-LNA...

This brief presents a broadband SiGe power amplifier that achieves 30.1 dBm peak <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{P}_{SAT}$ </tex-math></inline-formula> , 38.6% power-added efficiency (PAE), 90.9% large-signal fractional bandwidth (FBW) and 3 dB from 5.4 to 13.8 GHz. A balanced topology with two-stage, four-way combing is utilized achieve watt-level output high-power in wide range of...

The current work employs the HMC830 phase-locked loop chip to design a frequency synthesizer operating in L-band. can provide local oscillation signal for RF receiver front end. This article synthesis technique describe scheme. Due advantages of passive filters, such as simplicity, low cost, and phase noise, fourth-order RLC filter is proposed improve output quality reduce noise. performance this compared with RC filter. effects these two filters on capture time, spur suppression are...